List of accepted papers

• 27 A COST-EFFECTIVE TAG DESIGN FOR MEMORY DATA AUTHENTICATION IN EMBEDDED SYSTEMS
• 05 A HYBRID JUST-IN-TIME COMPILER FOR ANDROID
• 82 A LOW-OVERHEAD INTERCONNECT ARCHITECTURE FOR VIRTUAL RECONFIGURABLE FABRICS
• 13 ARCHITECTURAL SYNTHESIS OF FLOW-BASED MICROFLUIDIC LARGE-SCALE INTEGRATION BIOCHIPS
• 18 DAAC: DEVICE-RESERVED MEMORY AS AN EVICTION-BASED FILE CACHE
• 08 ENERGY EFFICIENT HYBRID DISPLAY AND PREDICTIVE MODELS FOR EMBEDDED AND MOBILE SYSTEMS
• 11 ENERGY EFFICIENT SPECIAL INSTRUCTION SUPPORT IN AN EMBEDDED PROCESSOR WITH COMPACT ISA
• 57 FUNCTION INLINING AND LOOP UNROLLING FOR LOOP ACCELERATION IN RECONFIGURABLE PROCESSORS
• 46 INTEGRATING SOFTWARE CACHES WITH SCRATCH PAD MEMORY
• 31 LAZY CACHE INVALIDATION FOR SELF-MODIFYING CODES
• 88 LLBT: AN LLVM-BASED STATIC BINARY TRANSLATOR
• 59 POWER AGNOSTIC TECHNIQUE FOR EFFICIENT TEMPERATURE ESTIMATION OF MULTICORE EMBEDDED SYSTEMS
• 69 RACECAR: A HEURISTIC FOR AUTOMATIC FUNCTION SPECIALIZATION ON MULTI-CORE HETEROGENEOUS SYSTEMS
• 53 REVISITING LEVEL-0 CACHES IN EMBEDDED PROCESSORS
• 39 SCENARIO-BASED DESIGN FLOW FOR MAPPING STREAMING APPLICATIONS ONTO ON-CHIP MANY-CORE SYSTEMS
• 23 STATIC SECURE PAGE ALLOCATION FOR LIGHT-WEIGHT DYNAMIC INFORMATION FLOW TRACKING
• 96 STATIC TASK PARTITIONING FOR LOCKED CACHES IN MULTI-CORE REAL-TIME SYSTEMS
• 66 WHEN LESS IS MORE (LIMO): CONTROLLED PARALLELISM FOR IMPROVED ENERGY EFFICIENCY