Tutorial T4

Title: Integrating Compute Acceleration Into Embedded System Design Using Vitis

Abstract: AMD-Xilinx is the inventor of the FPGA, programmable SoCs, and now, the ACAP. Our highly flexible programmable silicon, enabled by a suite of advanced software and tools, drives rapid innovation across a wide span of industries and technologies – from consumer to cars to the cloud. The goal of this tutorial is to introduce the Vitis software development environment for designing accelerators for embedded systems using Vitis.. Attendees will have the opportunity to learn how to use these tools, test the tutorial examples on the target boards, and explore the latest Vitis AI, Versal AIE technologies.

Topics to be covered
  • Vitis development framework and design flows
  • Vitis HLS project creation flow, profiling and design analysis
  • Vitis embedded platform based design flow
  • Introduction to Vitis AI and Versal AIE
Target Audience

Embedded hardware and software developers. This is an introductory tutorial, but it is expected that attendees have some programming experience and basic understanding of computer architecture.

Biographies of the speakers:

Joshua LU is currently working for AMD AECG group (former Xilinx) as senior product application manager. He covers the Asia region, his group is part of the Xilinx University Program team which is technical group inside AECG group CTO office. He has more than 15 years’ experience with Xilinx embedded solutions and actively engaged in Xilinx open source project called PYNQ. He has published Vivado, Zynq, NetFPGA related textbooks in Chinese.