Tutorial T6

Title: HW/SW Codesign for Brain-Inspired Hyperdimensional In-Memory Computing


Breakthroughs in deep learning consistently drive innovation. However, DNNs tend to overwhelm conventional computing systems. Hyperdimensional Computing (HDC) is rapidly gaining prominence as a potent method for rapid learning from a relatively small amount of data. It also holds the promise of offering energy-efficient lightweight computation. This tutorial will provide a comprehensive overview of the major shortcomings of existing von Neumann architectures and the growing need for innovative designs that fundamentally reduce memory latency and energy consumption by enabling data processing within the memory itself. Additionally, the tutorial will delve into the immense potential of beyond-von Neumann architectures, which utilize both emerging beyond-CMOS devices like Ferroelectric Field-Effect Transistors (FeFET) and conventional CMOS devices. The tutorial will last for 3 hours and will adopt a hands-on approach. It will begin with a comprehensive overview of brain-inspired hyperdimensional computing and its remarkable synergy with beyond von Neumann architectures, such as Compute-in-Memory (CiM)-based hardware acceleration. Participants will gain in-depth practical experience in effectively applying HDC algorithms for various machine learning tasks. The hands-on tutorial will cover HDC training and HDC inference for different classification tasks.


Hussam Amrouch is Professor (W3) heading the Chair of AI Processor Design at the Technical University of Munich (TUM) and, additionally, he is with the Munich Institute of Robotics and Machine Intelligence (MIRMI) in Germany. Further, he is the head of the Semiconductor Test and Reliability (STAR) at the University of Stuttgart, Germany. Prior to that, he was a research group leader at the Karlsruhe Institute of Technology (KIT) where he was leading the research efforts in building dependable embedded systems. He currently serves as editor at the Scientific Reports Journal published by Nature. He received his Ph.D. degree with the highest distinction (summa cum laude) from KIT in 2015. He has served on the technical program committees of many major EDA conferences such as DAC, ICCAD, etc., and as a reviewer in many top journals like Nature Electronics, Nature Communications, TED, TCAS-I. He has more than 210 publications in multidisciplinary research areas (including 86 journals) across the entire computing stack, starting from semiconductor physics to circuit design all the way up to computer architecture. His research in HW security and reliability have been funded by the German Research Foundation (DFG), Advantest Corporation, and the U.S. Office of Naval Research (ONR).