Education Classes

The education classes will be held online on Friday, September 27, 2024.

EC 1. Design Space Exploration for Deep Learning at the Edge

In this lecture, I will address the instrumental role of system-level design space exploration methods for achieving efficient deep learning (i.e., model inference) on resource-constrained devices at the Edge. The first part of the lecture consists of a basic introduction to (system-level) design space exploration (DSE) for embedded computer systems, explaining the fundamental ingredients of DSE such as methods to evaluate a single design solution as well as approaches to search vast design spaces. In the second part of the lecture, I will focus on an important application domain where system-level DSE plays a crucial role: deep learning at the Edge. Here, I will limit the discussion to two specific directions in the domain of Edge AI, dealing with the resource-constrained nature of (embedded) edge devices: hardware-aware Neural Architecture Search (NAS) and distributed inference of large neural networks on multiple edge devices. For each of these two Edge AI topics, I will explain the needs and challenges regarding system-level DSE, covering a range of optimization objectives: performance, energy consumption, memory footprint, and reliability.

Bio: Andy D. Pimentel is full professor at the University of Amsterdam. His research centers around the design, programming and run-time management of multi-core and multi processor (embedded) computer systems. The modeling, analysis and optimization of the extra-functional aspects of these systems, such as performance, power/energy consumption, thermals, reliability but also the degree of productivity to design and program these systems, play a pivotal role in his work. He holds an MSc and PhD in computer science from the University of Amsterdam. Andy Pimentel is co-founder of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS). He has (co-)authored more than 150 scientific publications and is the recipient of the prestigious Test of Time Award from the IEEE/ACM CODE+ISSS 2022 conference. He served as the General Chair of the HIPEAC 2015 conference, as Local Organization Co-Chair of Embedded Systems Week 2015, as Program (Co-)Chair of CODES+ISSS in 2016 and 2017, and as General Chair of DATE in 2024. Furthermore, he has served on the TPC of most leading (embedded) computer systems design conferences, such as DAC, DATE, CODES+ISSS, ICCD, and ICCAD.

EC 2. Enabling Energy-efficient AI Computing: Leveraging Application-specific Approximations

Approximate arithmetic operators, such as adders and multipliers, are increasingly used to satisfy resource-constrained embedded systems’ energy and performance requirements. However, most of the available approximate operators result from application-agnostic design methodology, and the efficacy of these operators can only be evaluated by employing them in the applications. The application agnostic-design methodology can result in approximate operators, which may not satisfy an application’s accuracy-performance constraints. Further, the various available libraries of approximate operators do not share any standard approximation-induction policy to design new operators according to an application’s accuracy and performance constraints. In this education class, we will discuss different methodologies to demonstrate the synthesis of novel application-specific approximate operators providing different accuracy-performance trade-offs.

Bios: Salim Ullah is a Postdoctoral Researcher at the Chair of Embedded Systems at Ruhr Universität Bochum. Previously, he was a Research Associate at the Chair of Processor Design at Technische Universität Dresden, where he also completed his PhD. He holds a BSc and MSc in Computer Systems Engineering from the University of Engineering and Technology (UET), Peshawar, Pakistan. His current research interests include the Design of Approximate Arithmetic Units, Approximate Caches, and Hardware Accelerators for Deep Neural Networks.

Siva Satyendra Sahoo is currently working as an R&D Engineer (Specialist) with IMEC, Leuven. He received his doctoral degree (Ph.D., 2015-2019) in the field of reliability in heterogeneous embedded systems from the National University of Singapore, Singapore. He completed his masters (M.Tech, 2010-2012) from the Indian Institute of Science, Bangalore in the specialization Electronics Design Technology. He has also worked with Intel India, Bangalore, in the domain of Physical Design. His research interests include Embedded Systems, Machine Learning, Approximate Computing, Reconfigurable Computing, Reliability-aware Computing Systems, and System-level Design.

Akash Kumar received the joint Ph.D degree in electrical engineering and embedded systems from the Eindhoven University of Technology, Eindhoven, The Netherlands, and the National University of Singapore (NUS), Singapore, in 2009. From 2009 to 2015, he was affiliated with the National University of Singapore (NUS). From 2015 to 2016, he served as a Professor at Technische Universität Dresden, Germany, where he led the Chair of Processor Design. He is currently a Professor at Ruhr Universität Bochum, where he directs the Chair of Embedded Systems. His current research interests include the design, analysis, and resource management of low-power and fault-tolerant embedded multiprocessor systems.

EC 3. Efficient Neural Networks: from SW optimization to specialized HW accelerators

Artificial Neural Networks (ANNs) appear to be one of the technological revolutions of recent human history. The capability of such systems does not come at a low cost, which led researchers to develop more and more efficient techniques to implement them. Optimization approaches have been developed, such as pruning and quantization, leading to reduced memory and computation requirements. Furthermore, such approaches are adapted to the specific hardware platform features to further increase efficiency. To improve it further, the HW programmability can be traded off in favor of more specialized custom HW ANN accelerators. In this education abstract, we illustrate how optimizing operations execution at different levels, from SW to HW, can improve the efficiency of ANN execution.

Bio: Marcello Traiola is a tenured Research Scientist with the Inria Research Institute, at the IRISA laboratory in Rennes, France. He received the Laurea degree (MSc) in Computer Engineering in 2016 from the University of Naples Federico II, Italy, and the Ph.D. degree in Computer Engineering in 2019 from the University of Montpellier, France. He regulary serves as a committee member and organizing member at several international conferences. His main research topics are emerging computing paradigms with special interest in hardware design, test, and reliability.

EC 4. Primer on Data on Quantum Machine Learning

With the increased interest in Quantum Machine Learning (QML), the integration of classical data into quantum systems presents unique challenges and opportunities. The class “Primer on Data in Quantum Machine Learning” delves into the foundational concepts and advanced techniques of embedding classical data into quantum states, a critical process for enhancing the performance of quantum algorithms. By exploring various quantum embedding methods and understanding their strengths and limitations, participants will gain a comprehensive understanding of the impact quantum embeddings can have on machine learning applications. This lesson will cover the following concepts: Fundamental Concepts of Quantum Machine Learning, Limits of NISQ devices and Computing in the NISQ era, Embeddings for QML, and Practical effects of embeddings. The understanding of these topics should provide a better understanding of the importance and effect of embeddings on the overall performance of QML in the NISQ era.

Bios: Aviral Shrivastava is a full Professor in the School of Computing and Augmented Intelligence (SCAI) at the Arizona State University. He completed his Ph.D. in Information and Computer Science and from the University of California, Irvine, and bachelor’s in Computer Science and Engineering from IIT Delhi. Prof. Shrivastava’s research lies on making programming simpler by proposing novel architectures, compilers, and algorithms for embedded, cyber-physical, and quantum systems.

Vinayak Sharma is a PhD student in the School of Computing and AI at Arizona State University. He completed his MS in CS from ASU, and Bachelors in CS from SRM IST Chennai. His research lies at the intersection of Quantum Computing and Machine Learning.

EC 5. AI-Driven Indoor Navigation with Mobile Embedded Systems

Indoor navigation is a foundational technology to assist the tracking and localization of humans, autonomous vehicles, drones, and robots in indoor spaces. Due to the lack of penetration of GPS/GNSS signals in buildings, subterranean locales, and dense urban environments, indoor navigation solutions typically make use of ubiquitous wireless signals (e.g., WiFi) and sensors in mobile embedded systems to perform tracking and localization. This tutorial provides an overview of state-of-the-art indoor navigation solutions, the many challenges facing these systems, and then describes how AI algorithms deployed on mobile embedded/IoT systems can overcome these challenges. The tutorial specifically goes over the multi-faceted challenges of energy-efficient AI deployment on embedded/IoT platforms, AI robustness strategies to deal with heterogeneity in device hardware/software stacks and environmental noise, security mitigation techniques to deal with attacks on infrastructure, AI adversarial examples, and AI model/data poisoning, and how stable predictions from AI models can be maintained over years of deployment. Several open challenges with AI and embedded/IoT systems will be discussed, which can serve as valuable resources for those looking for new research directions to pursue in this dynamic and emerging field.

Bio: Sudeep Pasricha is a Walter Scott Jr. College of Engineering Professor in the Department of Electrical and Computer Engineering, the Department of Computer Science, and the Department of Systems Engineering at Colorado State University. He is Director of the Embedded, High Performance, and Intelligent Computing (EPIC) Laboratory and the Chair of Computer Engineering. He received the B.E. degree in Electronics and Communication Engineering from Delhi Institute of Technology, India, in 2000, and his Ph.D. in Computer Science from the University of California, Irvine in 2008. He joined Colorado State University (CSU) in 2008. Prior to joining CSU, he spent several years working in STMicroelectronics and Conexant Inc. His research focuses on the design and application of innovative software algorithms (particularly AI and machine learning), hardware architectures, and hardware-software co-design techniques for energy-efficient, fault-tolerant, real-time, and secure computing. He has co-authored seven books, multiple patents, and published more than 300 research articles in peer-reviewed journals and conferences, workshops, and books. His research has been funded by various sponsors including NSF, SRC, AFOSR, DOE, ORNL, DoD, Fiat-Chrysler, HPE, and NASA. He has served as General Chair and Program Committee Chair for multiple IEEE and ACM conferences, and also served in the Editorial board of multiple IEEE and ACM journals. He has received 17 Best Paper Awards and Nominations at various IEEE and ACM conferences. Other notable awards include: 2024 IEEE CEDA Distinguished Lecturer, 2024 ECE Excellence in Teaching Award, 2022 ACM Distinguished Speaker, 2019 George T. Abell Outstanding Research Faculty Award, the 2016-2018 University Distinguished Monfort Professorship, 2016-2019 Walter Scott Jr. College of Engineering Rockwell-Anderson Professorship, 2018 IEEE-CS/TCVLSI mid-career research Achievement Award, the 2015 IEEE/TCSC Award for Excellence for a mid-career researcher, the 2014 George T. Abell Outstanding Mid-career Faculty Award, and the 2013 AFOSR Young Investigator Award. For professional service, he has received the 2019 ACM SIGDA Distinguished Service Award, the 2015 ACM SIGDA Service Award, and the 2012 ACM SIGDA Technical Leadership Award. He is a Fellow of the IEEE, Fellow of AAIA, Fellow of AIIA, Distinguished Member of the ACM, an IEEE CEDA Distinguished Lecturer, and an ACM Distinguished Speaker.

EC 6. MLSysBook.AI: Principles and Practices of Engineering Artificially Intelligent Systems

MLSysBook.AI is an open-source textbook designed to teach Machine Learning Systems Engineering, bridging the gap between theoretical ML concepts and practical engineering principles. It posits that if ML algorithm developers are like astronauts exploring space, ML systems engineers are the rocket scientists and mission control specialists who get them there and keep the mission on track. To this end, MLSysBook.AI covers the entire lifecycle of ML systems—from data engineering and model training to deployment, optimization, and maintenance—emphasizing interdisciplinary approaches, scalability, and real-world applications. It uses TinyML as a practical teaching tool and provides a comprehensive understanding of building robust and efficient ML systems, equipping students with the skills to design, deploy, and maintain cutting-edge AI technologies.

Bio: Dr. Vijay Janapa Reddi is a Professor at Harvard University and Vice President of MLCommons, specializing in machine learning systems, mobile computing, and IoT. He has made significant contributions to education through his open-source book “Machine Learning Systems” (https://mlsysbook.ai) and the development of the Tiny Machine Learning (TinyML) series on edX, which has reached tens of thousands of students worldwide. With a PhD from Harvard and numerous accolades, including induction into the MICRO and HPCA Halls of Fame, he continues to bridge the gap between cutting-edge research and practical education in computer engineering/science and machine learning.

EC 7. What do Transformers have to learn from Biological Spiking Neural Networks?

The brain is the perfect place to look for inspiration to develop more efficient neural networks. One of the main differences with modern deep learning is that the brain encodes and processes information as spikes rather than continuous, high-precision activations. This presentation will dive into how the open-source ecosystem has been used to develop brain-inspired neuromorphic accelerators, from our development of a Python training library for spiking neural networks (snnTorch, >100,000 downloads). We will explore how this is linked to our MatMul-free Language Model, providing insight into the next generation of large-scale, billion parameter models.

Bios: Jason Eshraghian is an Assistant Professor with the Department of Electrical and Computer Engineering, University of California, Santa Cruz. He received the Bachelor of Engineering (Electrical and Electronic) and the Bachelor of Laws degrees from The University of Western Australia in 2016, where he also received the Ph.D. Degree in 2019. From 2019 to 2022, he was a Fulbright Research Fellow at the University of Michigan, MI, USA. He has received 5 IEEE Best Paper/Live Demonstration Awards, and serves as a Scientific Advisory Board Member for Brainchip, the Secretary of the Neural Systems and Applications Technical Committee, and as an Associate Editor for APL Machine Learning.

Rui-Jie Zhu is pursuing a Ph.D. in Electrical and Computer Engineering at UC Santa Cruz under the supervision of Jason Eshraghian. He earned his Bachelor’s degree from the University of Electronic Science and Technology of China in 2023.