CASES: CALL FOR WIP PAPERS

CASES 2023 solicits the submission of original research articles for short Work-in-Progress papers that will be published in the CASES Proceedings. CASES solicits submissions on the following topics divided into five technical tracks. Each submission needs to specify one primary and one secondary track based on the relevance of the paper’s technical content to the tracks. More information about the submission is at https://www.esweek.org/author-information.

PDF version of the call.

Topics of Interests

Track 1: AI Systems and Applications of AI at Edge
Artificial Intelligence of Things (IoT), Edge intelligence, Architectures, accelerators, and compilers for artificial intelligence hardware; Applications of machine learning algorithms and techniques to embedded systems, IoT, and Cyber-Physical Systems (CPS); Neuromorphic and cognitive computing, analytics for embedded applications; and validation techniques for AI components.

Track 2: Embedded Systems and IoT/CPS Security, Safety, Reliability, and Energy-Efficiency
Secure architectures, hardware security, software security for embedded systems, IoT, and CPS; Architecture, design, and compiler techniques for energy efficiency, reliability, and aging; Modeling, analysis, and optimization for timing and predictability; Validation, verification, testing, and debugging of embedded software.

Track 3: Memory and Storage
Memory system architecture; Persistent memory, Emerging memory technologies (e.g., ReRAM, MRAM, FeRAM, DNA); Caches, scratchpad memory, and compiler-controlled memory; Reconfigurable memory; Processing-in-memory; and storage systems.

Track 4: Accelerators, Emerging Technologies, and Applications
Synthesis, optimization, and design-space exploration of high-performance, low-power accelerators; Domain-specific accelerators; Compilers for accelerators; Biologically-inspired computing; Heterogeneous and domain-specific multi-core SoC; Approximate computing; Flexible, stretchable, and flexible hybrid electronics (FHE); Augmented/virtual reality.

Track 5: Architectures, Compilers, System-level Design
Embedded and mobile processor micro-architecture, Multi- and many-core processors, GPU architectures, Reconfigurable computing including FPGAs and CGRAs for embedded systems and IoT/CPS, Application-Specific processor design, 3D-stacked architectures; Networks-on-Chip (NoC) architectures; on-chip communication; I/O management in embedded systems; and compiler support for CPU, GPU, reconfigurable computing, compilation for memory, storage, and on-chip communications.

CASES Program Chairs

Swarup Bhunia

CASES TPC Chair

University of Florida, US

Jana Doppa

CASES TPC Co-Chair

Washington State University, US

Coming Soon!