ESWEEK | Best Paper Awards


CASES: Efficient Scheduling of Irregular Network Structures on CNN Accelerators

Shixuan Zheng, Xianjue Zhang, Daoli Ou, Shibin Tang, Leibo Liu, Shaojun Wei and Shouyi Yin

CODES+ISSS: Everything Leaves Footprints: Hardware Accelerated Intermittent Deep Inference

Chih-Kai Kang, Hashan Roshantha Mendis, Chun-Han Lin, Ming-Syan Chen and Pi-Cheng Hsiu

EMSOFT: Efficient Feasibility Analysis for Graph-based Real-Time Task Systems

Jinghao Sun, Rongxiao Shi, Kexuan Wang, Nan Guan and Zhishan Guo

CASES Test-of-Time: Computation offloading to save energy on handheld devices: a partition scheme (2001)

Zhiyuan Li, Cheng Wang and Rong Xu

CODES+ISSS Test-of-Time: Key research problems in NoC design: a holistic perspective (2005)

Umit Y. Ogras, Jingcao Hu and Radu Marculescu

EMSOFT Test-of-Time: Interface Theories for Component-Based Design (2001)

Luca de Alfaro and Thomas A. Henzinger


CASES: An Ultra-Low Energy Human Activity Recognition Accelerator for Wearable Health Applications

Ganapati Bhat, Yigit Tuncel, Sizhe An, Hyung Gyu Lee, Umit Ogras

CODES+ISSS: Achieving Lossless Accuracy with Lossy Programming for Efficient Neural-Network Training on NVM-Based Systems

Wei-Chen Wang, Yuan-Hao Chang, Tei-Wei Kuo, Chien-Chung Ho, Yu-Ming Chang, Hung-Sheng Chang

EMSOFT: Deriving Equations from Sensor Data Using Dimensional Function Synthesis

Sam Willis, Youchao Wang, Vasileios Tsoutsouras, Phillip Stanley-Marbell

CASES Test-of-Time: Process Cruise Control: Event-driven Clock Scaling for Dynamic Power Management (2002)

Andreas Weissel and Frank Bellosa

CODES+ISS Test-of-Time: Transaction level modeling: an overview (2003)

Lukai Cai and Daniel Gajski

EMSOFT Test-of-Time: Reliable and Precise WCET Determination for a 
Real-Life Processor (2001)

Christian Ferdinand, Reinhold Heckmann, Marc Langenbach, Florian Martin, Michael Schmidt, Henrik Theiling, Stephan Thesing and Reinhard Wilhelm


CASES: Minimally Biased Multipliers for Approximate Integer and Floating‐Point Multiplication

Hassaan Saadat, Haseeb Bokhari, Sri Parameswaran

CODES+ISSS: XNOR Neural Engine: a Hardware Accelerator IP for 21.6 fJ/op Binary Neural Network Inference

Francesco Conti, Pasquale Davide Schiavone, Luca Benini

EMSOFT: Bounding DRAM Interference in COTS Heterogeneous MPSoCs for Mixed Criticality Systems

Mohamed Hassan, Rodolfo Pellizzoni


CASES: Low-Cost Memory Fault Tolerance for IoT Devices

Mark Gottscho, Irina Alam, Clayton Schoeny, Lara Dolecek, Puneet Gupta

CODES+ISSS: Flexible PV-cell modeling for energy harvesting in wearable IoT applications

Jaehyun Park, Hitesh Joshi, Hyung Gyu Lee, Sayfe Kiaei and Umit Ogras

EMSOFT: Security-Aware Scheduling of Embedded Control Tasks

Vuk Lesi, Ilija Jovanov, Miroslav Pajic


CASES: CaffePresso: An Optimized Library for Deep Learning on Embedded Accelerator-based Platforms

Gopalakrishna Hegde, Siddhartha, Nachiappan Ramasamy, & Nachiket Kapre

CODES+ISSS: A Design to Reduce Write Amplification in Object-based NAND Flash Devices

Jie Guo, Chuhan Min, Tao Cai, & Yiran Chen

EMSOFT: Underminer: A Framework for Automatically Identifying Non-Convergent Behaviors in Black Box System Models

Ayca Balkan, Paulo Tabuada, Jyotirmoy Deshmukh, Xiaoqing Jin, & James Kapinski


CASES: Vector-Aware Register Allocation for GPU Shader Processors?

Yi-Ping You and Szu-Chieh Chen

CODES+ISSS: R2Cache: Reliability-Aware Reconfigurable Last-Level Cache Architecture for Multi-Cores

Florian Kriebel, Arun Subramaniyan, Semeen Rehman, Segnon Jean Bruno, Ahandagbe, Muhammad Shafique, and Jörg Henkel

EMSOFT: A Scalable Algebraic Method to Infer Quadratic Invariants of Switched Systems

Xavier Allamigeon, Stephane Gaubert, Eric Goubault, Sylvie Putot, and Nikolas Stott


CASES: Context-Sensitive Timing Simulation of Binary Embedded Software

Sebastian Ottlik, Stefan Stattelmann, Alexander Viehl, Oliver Bringmann, and Wolfgang Rosenstiel

CODES+ISSS: TSP: Thermal Safe Power – Efficient power budgeting for Many-Core Systems in Dark Silicon

Santiago Pagani, Heba Khdr, Waqaas Munawar, Jian-Jia Chen, Muhammad Shafique, Minming Li, and Joerg Henkel

EMSOFT: Multiple Shooting, CEGAR-based Falsification of Hybrid Systems

Aditya Zutshi, Sriram Sankaranarayanan, Jyotirmoy V. Deshmukh, and James Kapinski


CASES: ILPc: A Novel Approach for Scalable Timing Analysis of Synchronous Programs

Jia Jie Wang, Partha Roop and Sidharta Andalam

CODES+ISSS: Improving Polyhedral Code Generation for High-Level Synthesis

Wei Zuo, Peng Li, Deming Chen, Louis-Noel Pouchet, Shunan Zhong and Jason Cong

EMSOFT: Safety Verification for Linear Systems

Sridhar Duggirala and Ashish Tiwari


CASES: Power Agnostic Technique for Efficient Temperature Estimation of Multicore Embedded Systems

Devendra Rai, Hoeseok Yang, Iuliana Bacivarov and Lothar Thiele

CODES+ISSS: A Traffic-Aware Adaptive Routing Algorithm on a Highly Reconfigurable Network-on-Chip Architecture

Zhiliang Qian, Paul Bogdan, Guopeng Wei, Chi-Ying Tsui, and Radu Marculescu

EMSOFT: Programming Parallelism with Futures in Lustre

Albert Cohen, Léonard Gérard, and Marc Pouzet


CASES: Architecting Processors to Allow Voltage/Reliability Tradeoffs

John Sartori and Rakesh Kumar

CODES+ISSS: Reliable Software for Unreliable Hardware: Embedded Code Generation aiming at Reliability

S. Rehman, M. Shafique, F. Kriebel, J. Henkel

EMSOFT: Real-Time Resource-Sharing under Clustered Scheduling: Mutex, Reader-Writer, and k-Exclusion Locks

Björn B. Brandenburg and James H. Anderson


CODES+ISSS: Worst-case Performance Analysis of Synchronous Dataflow Scenarios

Marc Geilen and Sander Stuijk

EMSOFT: Automatic verification of control system implementations

Adolfo Anta, Rupak Majumdar, Indranil Saha and Paulo Tabuada


CASES: Tabu search-based synthesis of dynamically reconfigurable digital microfluidic biochips

Elena Maftei, Paul Pop, Jan Madsen

CODES+ISSS: A Standby-Sparing Technique with Low Energy-Overhead for Fault-Tolerant Hard Real-Time Systems

Alireza Ejlali, Bashir Al-Hashimi, and Petru Eles

EMSOFT: Analytic Real-Time Analysis and Timed Automata: A Hybrid Method for Analyzing Embedded Real-Time Systems

Kai Lampka, Simon Perathoner and Lothar Thiele


CASES: Control Flow Optimization in Loops using Interval Analysis

Mohammad Ali Ghodrat, Tony Givargis, Alex Nicolau

CODES+ISSS: Hardware/Software Partitioning of Floating Point Software Applications to Fixed-Point Coprocessor Circuits

L. Saldanha, R. Lysecky

EMSOFT: Symbolic Analysis for Improving Simulation Coverage of Simulink/Stateflow Models

Rajeev Alur, Aditya Kanade, S. Ramesh and K. C. Shashidhar


CASES: Rethinking custom ISE identification: a new processor-agnostic method

Ajay K. Verma, Philip Brisk, Paolo Ienne

CODES+ISSS: Dynamic Security Domain Scaling on Symmetric Multiprocessors for Future High-End Embedded Systems

Hiroaki Inoue, Akihisa Ikeno, Tsuyoshi Abe, Junji Sakai, and Masato Edahiro


CASES: Probabilistic Arithmetic and Energy Efficient Embedded Signal Processing

Jason George, Bo Marr, Bilge E. S. Akgul and Krishna V. Palem

CODES+ISSS: Architectural support for safe software execution on embedded processors

D. Arora, A. Raghunathan, S. Ravi, and N. K. Jha


CASES: Exploring the Design Space of LUT-based Transparent Accelerators

Sami Yehia, Nathan Clark, Scott Mahlke, and Krisztian Flautner

CODES+ISSS: A Unified Approach to Constrained Mapping and Routing on Network-on-Chip Architectures

Andreas Hansson, Kees Goossens, and Andrei Radulescu