Best Paper and Test-of-Time Awards
2024
CASES: A Dataflow-aware Network-on-Interposer for CNN Inferencing in the Presence of Defective Chiplets
Harsh Sharma, Umit Ogras, Ananth Kalyanraman, Partha Pratim Pande
CODES+ISSS: Reliable, Versatile, and Efficient Data Matching in SSD’s NAND Flash Memory Chip for Data Indexing Acceleration
Yun-Chih Chen, Yuan-Hao Chang, Tei-Wei Kuo
EMSOFT: Thread Carefully: Preventing Starvation in the ROS 2 Multithreaded Executor
Harun Teper, Daniel Kuhse, Mario Günzel, Georg von der Brüggen, Falk Howar, Jian-Jia Chen
CASES Test-of-Time: Highly Energy and Performance Efficient Embedded Computing through Approximately Correct Arithmetic: A Mathematical Foundation and Preliminary Experimental Validation
Lakshmi N.B. Chakrapani, Kirthi Krishna Muntimadugu, Avinash Lingamneni, Jason George, Krishna V. Palem
CODES+ISSS Test-of-Time: Temperature-aware Processor Frequency Assignment for MPSoCs Using Convex Optimization
Srinivasan Murali, Almir Mutapcic, David Atienza, Rajesh Gupta, Stephen Boyd, Giovanni De Micheli
EMSOFT Test-of-Time: Symbolic analysis for improving simulation coverage of Simulink/Stateflow models
Rajeev Alur, Aditya Kanade, S. Ramesh, K.C. Shashidhar
2023
CASES: ZPP: A Dynamic Technique to Eliminate Cache Pollution in NoC based MPSoCs
Dipika Deb, John Jose
CODES+ISSS: Florets for Chiplets: Data Flow-aware High-Performance and Energy-efficient Network-on-Interposer for CNN Inference Tasks
Harsh Sharma, Lukas Pfromm, Rasit Onur Topaloglu, Jana Doppa, Umit Ogras, Ananth Kalyanaraman, Partha Pratim Pande
EMSOFT: Equation-Directed Axiomatization of Lustre Semantics to Enable Optimized Code Validation
Lélio Brun, Christophe Garion, Pierre-loic Garoche, Xavier Thirioux
CASES Test-of-Time: Predictable Programming on a Precision Timed Architecture (2008)
Ben Lickly, Isaac Liu, Sungjun Kim, Hiren D. Patel, Stephen A. Edwards, Edward A. Lee
CODES+ISSS Test-of-Time: Predator: A Predictable SDRAM Memory Controller (2007)
Benny Akesson, Kees Goossens, Markus Ringhofer
EMSOFT Test-of-Time: Scheduling Multiple Independent Hard-Real-Time Jobs on a Heterogeneous Multiprocessor (2007)
Orlando Moreira, Frederico Valente, Marco Bekooij
2022
CASES: SWAP: A Server-Scale Communication-Aware Chiplet-Based Manycore PIM Accelerator
Harsh Sharma, Sumit K. Mandal, Janardhan Rao Doppa, Umit K. Ogras, Partha Pratim Pande
CODES+ISSS: Exploring Synchronous Page Fault Handling
Yin-Chiuan Chen, Chun-Feng Wu, Yuan-Hao Chang, Tei-Wei Kuo
EMSOFT: Tinkertoy: Build your own operating systems for IoT devices
Bingyao Wang, Margo Seltzer
CASES Test-of-Time: Scalable Custom Instructions Identification for Instruction-set Extensible Processors (2004)
Pan Yu and Tulika Mitra
CODES+ISSS Test-of-Time: A Framework for Rapid System-level Exploration, Synthesis, and Programming of Multimedia MP-SoCs (2007)
Mark Thompson, Hristo Nikolov, Todor Stefanov, Andy D. Pimentel, Cagkan Erbas, Simon Polstra, and Ed. F. Deprettere
EMSOFT Test-of-Time: Real-time Interfaces for Composing Real-time Systems (2006)
Lothar Thiele, Ernesto Wandeler, and Nikolay Stoimenov
2021
CASES: Two Birds with One Stone: Boosting Both Read and Write Performance for Tree Indices on Persistent Memory
Yongping Luo, Peiquan Jin, Zhou Zhang, Juncheng Zhang, Qinglin Zhang, and Bin Cheng
CODES+ISSS: Intermittent-Aware Neural Architecture Search
Hashan Roshantha Mendis, Chih-Kai Kang, and Pi-Cheng Hsiu
EMSOFT: Verified Lustre Normalization with Node Subsampling
Timothy Bourke, Basile Pesin, Paul Jeanmaire, and Marc Pouzet
CASES Test-of-Time: CFLRU: A Replacement Algorithm for Flash Memory (2006)
Seon-Yeong Park, Dawoon Jung, Jeong-Uk Kang, Jin-Soo Kim, and Joonwon Lee
CODES+ISSS Test-of-Time: A Unified Hardware/Software Runtime Environment for FPGA-based Reconfigurable Computers using BORPH (2006)
Hayden So, Art Tkachenko, and Robert Brodersen
EMSOFT Test-of-Time: A Superblock-based Flash Translation Layer for NAND Flash Memory (2006)
Jeong-Uk Kang, Heeseung Jo, Jin-Soo Kim, and Joonwon Lee
2020
CASES: Efficient Scheduling of Irregular Network Structures on CNN Accelerators
Shixuan Zheng, Xianjue Zhang, Daoli Ou, Shibin Tang, Leibo Liu, Shaojun Wei and Shouyi Yin
CODES+ISSS: Everything Leaves Footprints: Hardware Accelerated Intermittent Deep Inference
Chih-Kai Kang, Hashan Roshantha Mendis, Chun-Han Lin, Ming-Syan Chen and Pi-Cheng Hsiu
EMSOFT: Efficient Feasibility Analysis for Graph-based Real-Time Task Systems
Jinghao Sun, Rongxiao Shi, Kexuan Wang, Nan Guan and Zhishan Guo
CASES Test-of-Time: Computation offloading to save energy on handheld devices: a partition scheme (2001)
Zhiyuan Li, Cheng Wang and Rong Xu
CODES+ISSS Test-of-Time: Key research problems in NoC design: a holistic perspective (2005)
Umit Y. Ogras, Jingcao Hu and Radu Marculescu
EMSOFT Test-of-Time: Interface Theories for Component-Based Design (2001)
Luca de Alfaro and Thomas A. Henzinger
2019
CASES: An Ultra-Low Energy Human Activity Recognition Accelerator for Wearable Health Applications
Ganapati Bhat, Yigit Tuncel, Sizhe An, Hyung Gyu Lee, Umit Ogras
CODES+ISSS: Achieving Lossless Accuracy with Lossy Programming for Efficient Neural-Network Training on NVM-Based Systems
Wei-Chen Wang, Yuan-Hao Chang, Tei-Wei Kuo, Chien-Chung Ho, Yu-Ming Chang, Hung-Sheng Chang
EMSOFT: Deriving Equations from Sensor Data Using Dimensional Function Synthesis
Sam Willis, Youchao Wang, Vasileios Tsoutsouras, Phillip Stanley-Marbell
CASES Test-of-Time: Process Cruise Control: Event-driven Clock Scaling for Dynamic Power Management (2002)
Andreas Weissel and Frank Bellosa
CODES+ISS Test-of-Time: Transaction level modeling: an overview (2003)
Lukai Cai and Daniel Gajski
EMSOFT Test-of-Time: Reliable and Precise WCET Determination for a Real-Life Processor (2001)
Christian Ferdinand, Reinhold Heckmann, Marc Langenbach, Florian Martin, Michael Schmidt, Henrik Theiling, Stephan Thesing and Reinhard Wilhelm
2018
CASES: Minimally Biased Multipliers for Approximate Integer and Floating‐Point Multiplication
Hassaan Saadat, Haseeb Bokhari, Sri Parameswaran
CODES+ISSS: XNOR Neural Engine: a Hardware Accelerator IP for 21.6 fJ/op Binary Neural Network Inference
Francesco Conti, Pasquale Davide Schiavone, Luca Benini
EMSOFT: Bounding DRAM Interference in COTS Heterogeneous MPSoCs for Mixed Criticality Systems
Mohamed Hassan, Rodolfo Pellizzoni
2017
CASES: Low-Cost Memory Fault Tolerance for IoT Devices
Mark Gottscho, Irina Alam, Clayton Schoeny, Lara Dolecek, Puneet Gupta
CODES+ISSS: Flexible PV-cell modeling for energy harvesting in wearable IoT applications
Jaehyun Park, Hitesh Joshi, Hyung Gyu Lee, Sayfe Kiaei and Umit Ogras
EMSOFT: Security-Aware Scheduling of Embedded Control Tasks
Vuk Lesi, Ilija Jovanov, Miroslav Pajic
2016
CASES: CaffePresso: An Optimized Library for Deep Learning on Embedded Accelerator-based Platforms
Gopalakrishna Hegde, Siddhartha, Nachiappan Ramasamy, & Nachiket Kapre
CODES+ISSS: A Design to Reduce Write Amplification in Object-based NAND Flash Devices
Jie Guo, Chuhan Min, Tao Cai, & Yiran Chen
EMSOFT: Underminer: A Framework for Automatically Identifying Non-Convergent Behaviors in Black Box System Models
Ayca Balkan, Paulo Tabuada, Jyotirmoy Deshmukh, Xiaoqing Jin, & James Kapinski
2015
CASES: Vector-Aware Register Allocation for GPU Shader Processors?
Yi-Ping You and Szu-Chieh Chen
CODES+ISSS: R2Cache: Reliability-Aware Reconfigurable Last-Level Cache Architecture for Multi-Cores
Florian Kriebel, Arun Subramaniyan, Semeen Rehman, Segnon Jean Bruno, Ahandagbe, Muhammad Shafique, and Jörg Henkel
EMSOFT: A Scalable Algebraic Method to Infer Quadratic Invariants of Switched Systems
Xavier Allamigeon, Stephane Gaubert, Eric Goubault, Sylvie Putot, and Nikolas Stott
2014
CASES: Context-Sensitive Timing Simulation of Binary Embedded Software
Sebastian Ottlik, Stefan Stattelmann, Alexander Viehl, Oliver Bringmann, and Wolfgang Rosenstiel
CODES+ISSS: TSP: Thermal Safe Power – Efficient power budgeting for Many-Core Systems in Dark Silicon
Santiago Pagani, Heba Khdr, Waqaas Munawar, Jian-Jia Chen, Muhammad Shafique, Minming Li, and Joerg Henkel
EMSOFT: Multiple Shooting, CEGAR-based Falsification of Hybrid Systems
Aditya Zutshi, Sriram Sankaranarayanan, Jyotirmoy V. Deshmukh, and James Kapinski
2013
CASES: ILPc: A Novel Approach for Scalable Timing Analysis of Synchronous Programs
Jia Jie Wang, Partha Roop and Sidharta Andalam
CODES+ISSS: Improving Polyhedral Code Generation for High-Level Synthesis
Wei Zuo, Peng Li, Deming Chen, Louis-Noel Pouchet, Shunan Zhong and Jason Cong
EMSOFT: Safety Verification for Linear Systems
Sridhar Duggirala and Ashish Tiwari
2012
CASES: Power Agnostic Technique for Efficient Temperature Estimation of Multicore Embedded Systems
Devendra Rai, Hoeseok Yang, Iuliana Bacivarov and Lothar Thiele
CODES+ISSS: A Traffic-Aware Adaptive Routing Algorithm on a Highly Reconfigurable Network-on-Chip Architecture
Zhiliang Qian, Paul Bogdan, Guopeng Wei, Chi-Ying Tsui, and Radu Marculescu
EMSOFT: Programming Parallelism with Futures in Lustre
Albert Cohen, Léonard Gérard, and Marc Pouzet
2011
CASES: Architecting Processors to Allow Voltage/Reliability Tradeoffs
John Sartori and Rakesh Kumar
CODES+ISSS: Reliable Software for Unreliable Hardware: Embedded Code Generation aiming at Reliability
S. Rehman, M. Shafique, F. Kriebel, J. Henkel
EMSOFT: Real-Time Resource-Sharing under Clustered Scheduling: Mutex, Reader-Writer, and k-Exclusion Locks
Björn B. Brandenburg and James H. Anderson
2010
CODES+ISSS: Worst-case Performance Analysis of Synchronous Dataflow Scenarios
Marc Geilen and Sander Stuijk
EMSOFT: Automatic verification of control system implementations
Adolfo Anta, Rupak Majumdar, Indranil Saha and Paulo Tabuada
2009
CASES: Tabu search-based synthesis of dynamically reconfigurable digital microfluidic biochips
Elena Maftei, Paul Pop, Jan Madsen
CODES+ISSS: A Standby-Sparing Technique with Low Energy-Overhead for Fault-Tolerant Hard Real-Time Systems
Alireza Ejlali, Bashir Al-Hashimi, and Petru Eles
EMSOFT: Analytic Real-Time Analysis and Timed Automata: A Hybrid Method for Analyzing Embedded Real-Time Systems
Kai Lampka, Simon Perathoner and Lothar Thiele
2008
CASES: Control Flow Optimization in Loops using Interval Analysis
Mohammad Ali Ghodrat, Tony Givargis, Alex Nicolau
CODES+ISSS: Hardware/Software Partitioning of Floating Point Software Applications to Fixed-Point Coprocessor Circuits
L. Saldanha, R. Lysecky
EMSOFT: Symbolic Analysis for Improving Simulation Coverage of Simulink/Stateflow Models
Rajeev Alur, Aditya Kanade, S. Ramesh and K. C. Shashidhar
2007
CASES: Rethinking custom ISE identification: a new processor-agnostic method
Ajay K. Verma, Philip Brisk, Paolo Ienne
CODES+ISSS: Dynamic Security Domain Scaling on Symmetric Multiprocessors for Future High-End Embedded Systems
Hiroaki Inoue, Akihisa Ikeno, Tsuyoshi Abe, Junji Sakai, and Masato Edahiro
2006
CASES: Probabilistic Arithmetic and Energy Efficient Embedded Signal Processing
Jason George, Bo Marr, Bilge E. S. Akgul and Krishna V. Palem
CODES+ISSS: Architectural support for safe software execution on embedded processors
D. Arora, A. Raghunathan, S. Ravi, and N. K. Jha
2005
CASES: Exploring the Design Space of LUT-based Transparent Accelerators
Sami Yehia, Nathan Clark, Scott Mahlke, and Krisztian Flautner
CODES+ISSS: A Unified Approach to Constrained Mapping and Routing on Network-on-Chip Architectures
Andreas Hansson, Kees Goossens, and Andrei Radulescu
