You are here

Event Details

MP Associates, Inc.
WEDNESDAY October 18, 1:00pm - 2:30pm | Crystal 2
CODES+ISSS: Approximate Computing for Scalable and Energy Efficient Embedded Systems
Terrence Mak - Univ. of Southampton
Patti Davide - Univ. of Catania
Mak Terrence - Univ. of Southampton
Palesi Maurizio - Univ. of Cagliari
Energy-Efficient Image Processing using Significance-driven Adaptive Approximate Computing

With increasing resolutions the volume of data generated by image processing applications is escalating dramatically. As such, when coupled with real-time performance requirements, reducing energy consumption is proving highly challenging. In this paper, we propose a novel approach for image processing applications using significance-driven approximate computing. Core to our approach is the fundamental tenet that image data should be processed intelligently based on their informational value, i.e. significance. For the first time, we define the concept of significance in the context of image processing. We show how the complexity of data processing tasks can be drastically reduced when computing decisions are synergistically adapted to significance learning principles. Using these principles more significant data are processed at higher precision with higher operating frequencies, while those with less significance are processed at reduced precision at lower operating frequenàè ìùcies, while maintaining a given quality requirement. Two concrete case studies are used to evaluate the effectiveness of our approach: an application-specific hardware-based adaptive approximate image filter and a software-based variable-kernel based parallel convolution filter running on an Odroid XU-4 platform. We demonstrate that our approach reduces energy by up to 40% for a real-time performance requirement of 15 fps, when compared with the existing approaches that are agnostic of significance and quality/slash energy trade-offs.

Embedded Abundant-data Computing Enabled by Amalgamation, Acceleration and Approximation

The world’s appetite for abundant-data computing such as deep learning has increased dramatically. The computational demands of these applications far exceed the capabilities of today’s systems, especially for energy-constrained embedded systems. These demands cannot be met by isolated improvements in transistor technologies, memories, or integrated circuit (IC) architectures alone. Trans-formative nanosystems, which leverage the unique properties of emerging nanotechnologies to create new IC architectures, are required to deliver unprecedented functionality, performance, and energy efficiency. Our new nanosystems approach overcomes these challenges through recent advances across the computing stack: (a) highly energy-efficient logic and memory nanotechnologies; (b) Ultra-dense (e.g., monolithic) three-dimensional integration with fine-grained connectivity which enables new architectures for computation immersed in memory, (c) programmable accelerators that improve domain-specific computing energy efficiency, and, (d) approximation techniques for energy efficiency and error resilience. Compared to conventional approaches, our approach promises to improve energy efficiency of computing systems by several orders of magnitude, thereby paving a path toward embedded abundant-data computing (e.g., deep learning -- both training and inference -- on mobile devices and IoT nodes).

Navigating Accuracy-Energy Trade-offs for Hardware Acceleration

Hardware acceleration has emerged as a method of choice to improve the efficiency of systems that need to perform lots of data processing under stringent energy constraints, particularly for IoT and embedded systems. A critical component to maximizing the efficiency of hardware accelerators is to ensure that energy is not being wasted in producing overly accurate results. For instance, in most sensory or signal processing applications, using double precision floating point would certainly be overkill. This paper presents QAPPA, a Quality Autotuner for Precision Programmable Accelerators. QAPPA analyzes applications written in C++ and derives the precision requirements of each compute and arithmetic operations in the program. It utilizes a library of hardware models to predict energy and memory bandwidth savings at different application quality levels. We demonstrate the utility of QAPPA over 14 PERFECT kernels and show that QAPPA can derive minimal quantization settings from user-defined quality constraints to significantly improve the energy efficiency of fixed-function hardware accelerators.

An Efficient Hardware Design for Cerebellar Models using Approximate Circuits

The superior controllability of the cerebellum of primates has motivated extensive interest in the development of computational cerebellar models. Many models have been applied to the motor control and image stabilization in robots. Usually, cerebellar models are computationally complex, so they have rarely been implemented in dedicated hardware. Instead, a cerebellar model is often implemented in a system using a central processing unit (CPU) or a graphic processing unit (GPU) with a high energy consumption and a long latency. To overcome these drawbacks, we propose a cerebellar model implemented in approximate computing circuits with a low hardware overhead and a high speed, leveraging the inherent error tolerance in the cerebellum. As basic arithmetic elements in a cerebellar model, approximate adders and multipliers are carefully evaluated for implementations in an adaptive filter to achieve a best trade-off of accuracy and hardware overhead. A saccade system, whose vestibulo-ocular reflex (VOR) is controlled by the cerebellum, is simulated to show the applicability and effectiveness of the cerebellar model implemented in approximate circuits.

8B.1Significance-Driven Adaptive Approximate Computing for Energy-Efficient Image Processing Applications
 Speaker: Dave Burke - Newcastle Univ.
 Authors: Dave Burke - Newcastle Univ.
Dainius Jenkus - Newcastle Univ.
Issa Qiqieh - Newcastle Univ.
Rishad Shafik - Newcastle Univ.
Shidhartha Das - ARM Ltd.
Alex Yakovlev - Newcastle Univ.
8B.23D Nanosystems Enable Embedded Abundant-Data Computing
 Speaker: William Hwang - Stanford Univ.
 Authors: William Hwang - Stanford Univ.
Mohamed M. Sabry Aly - Stanford Univ.
Yash H. Malviya - Stanford Univ.
Mingyu Gao - Stanford Univ.
Tony F. Wu - Stanford Univ.
Christos Kozyrakis - Stanford Univ.
H.S. Philip Wong - Stanford Univ.
Subhasish Mitra - Stanford Univ.
8B.3Exploiting Quality-Energy Tradeoffs with Arbitrary Quantization
 Speaker: Thierry Moreau - Univ. of Washington
 Authors: Thierry Moreau - Univ. of Washington
Augusto Felipe - Univ. of Campinas
Howe Patrick - Univ. of Washington
Armin Alaghi - Univ. of Washington
Luis Ceze - Univ. of Washington
8B.4An Efficient Hardware Design for Cerebellar Models using Approximate Circuits
 Speaker: Jie Han - Univ. of Alberta
 Author: Jie Han - Univ. of Alberta