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Event Details

MP Associates, Inc.
SUNDAY October 15, 1:30pm - 5:00pm | Berkely, 36F
EVENT TYPE: TUTORIAL
SESSION 4T
Neural Networks on FPGAs and other Embedded Platforms

Speakers:
Nachiket Kapre - Univ. of Waterloo
Terry Stewart - Univ. of Waterloo
Guy Lemieux - Univ. of British Columbia
Organizer:
Nachiket Kapre - Univ. of Waterloo
Neural networks are enjoying widespread attention from industry and academia to address problems in different application domains such as vision, speech, and reasoning. The core computational kernels in such networks push modern embedded devices to their limits in terms of their compute capacity, and memory bandwidth and power usage. In this tutorial, we will aim to understand the sources of this complexity in neural network evaluations. We will then focus on implementing the computation across various embedded hardware platforms and identify the opportunities for customizing the mapping. In particular, we will focus on Convolutional Neural Networks, as well as NENGO, a biologically plausible model for brain-scale neural networks with applications to robotics and motion control. We will also take a closer look at the role of FPGAs in supporting efficient evaluation of such networks.  This tutorial is aimed at students and practitioners who want to learn about optimizing neural networks on modern embedded platforms.

Biographies:

Nachiket Kapre is an Assistant Professor in the Department of Electrical and Computer Engineering at University of Waterloo, Canada. He was previously an Assistant Professor at Nanyang Technological University, Singapore in the School of Computer Engineering (2012-2016) and an Imperial College Junior Research Fellow (2010-2012). He has received his M.S in Electrical Engineering (2005) and Computer Science (2006) and a PhD in Computer Science (2010) from California Institute of Technology, Pasadena. He is primarily interested in understanding and exploiting the potential of parallel, spatial architectures such as FPGAs for energy-efficient computing. His research has won best paper awards at FPT 2010, FPL 2015, and CASES 2016.

Dr. Terrence C. Stewart is a Research Associate with the Centre for Theoretical Neuroscience at the University of Waterloo.  He was a primary developer of Spaun, the first large-scale biologically realistic brain simulation capable of performing multiple tasks.  His current work is on further developing the neural “compiler” Nengo (which translates high-level algorithms into neurons), and extending it to work with diverse neuromorphic hardware.  This includes digital neuromorphic hardware (such as SpiNNaker) and analog neuromorphic hardware (such as Neurogrid).  The core emphasis is on identifying and developing algorithms that are efficient on massively parallel hardware.

Professor Guy Lemieux is CEO of VectorBlox Computing Inc. and a Professor in the Department of Electrical and Computer Engineering at The University of British Columbia. He has a research background in FPGA-based computing, FPGA devices, and place and route algorithms for FPGAs. He did his PhD at the University of Toronto, and is a registered Professional Engineer with APEGBC.